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| Resolution Company |
480x234 (Inch Model Name) |
400x234 (Inch/Model Name) |
320x234 (Inch/Model Name) |
160x234 (Inch/Model Name) |
Note |
| Samsung | 7.0"/LTE700WQ | 5.0"/LTS500Q1-CF3 | |||
| LG | 7.0"/LB070W02 | 6.5"/LB065WQ2 | |||
| AU (InnoLux) |
7.0"/A070FW02 |
6.5¡±/A065GW01 | 5.6¡±/A056DN01 | 4.0¡±/A040CN01 3.5"/A035CN02 |
the same kinds |
| Thoshiba (ProView) |
7.0"/LTA070B410A ( 7.0"/PV07LCM-T ) |
the same kinds | |||
| Sharp | 8.0"/LQ080T5GG01S 7.0"/LQ070T3GG003 |
5.0"/LQ050T3GG01S |
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| PVI | 8.0"/PW084XS2 |
6.5"/PW065XS1 | 6.4"/PA060XS1 |
3.5"/PA035XS1 |
3.5", 2,5" is delta |
| Sanyo | 8.0"/TM080WA 7.0"/TM070WA |
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| Other | HanStar |
ADT 5.0¡±/ADT050-C30P HanStar HSD050I551 |
(1) Master clock frequency
| 28.70 MHz | 480x234x3 Pixels |
| 23.97 MHz | 400x234x3 Pixels |
| 19.27 MHz | 320x234x3 Pixels |
| 19.27 MHz | 160x234x3 Pixels |
(2) Built-in Phase Comparator for PLL sub-function
- It creates the divide signal compared with CSYNC input.
- It need to use the external OP-Amp for LPF(Loop Filter) and VCO.
(Note) Refer to application circuit (Page 30).
(3) Built-in the Vertical Sync separator to get VSYNC from CSYNC input.
- It need not use the external circuit for Vertical Sync separation (slicer)
- Input is only CSYNC (Composite Sync Signal)
(4) Provides the control timing signal of LCD source and gate drivers.
All the necessary output signals to control the LCD source and gate driver is as follows:
- Source : HCLK1, HCLK2, HCLK3, STH1, STH2, OEH
- Gate : CPV, STV1, STV2, OEV1, OEV2, OEV3, MOD1, MOD2, FRP
(5) Provides the timing scan signals for Left / Right and Up / Down shift control.
(6) Provides Horizontal and vertical positions adjustment function.
- Horizontal: 1 sign bit and external RC delay
-> It is possible to control the start position on horizontal with detailed and largely
- Vertical : 3-bit (-4 ~ 3 lines: signed)
(7) Provides the several display mode ( Full, Normal, Zoom etc. ) .
- Full, Normal, Zoom1, Zoom2, Zoom3, Wide, Zoom Wide1, Zoom Wide2
(8) Provides Serial Communication
- CS, CLK, DATA
(9) NTSC/PAL system timing
- It has two types of method to select video (NTSC/PAL)
: Manual NTSC/PAL Selection or Auto NTSC/PAL Detection
- It outputs video detection signal whether video signal exits or not.
(10) It supports RGB pattern signal.
- It can use PLL clock or external clock (dot clock)
(11) Package: 48-TQFP
(12) Single power supply: 5.0Volts.
- Including Regulator (LDO: 5V to 3.3V)
- The output voltage of the signal related with panel will be 3.3V or 5.0V according to panel Logic voltage.
USB & PS2 Keyboard Encoder
General Purpose MCU
| Park Number | Package Type | Data sheet |
| PP707B | 48-TQFP |
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1106, Daeryung Post Tower 3 Cha, 182-4, Guro 3-Dong, Guro-Gu Seoul 152-847, Korea Tel: 82-2-508-0591 Fax: 82-2-508-1422
Copyright © 2007 PointChips CO.,Ltd. All rights reserved
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